Nol.A SDK Library 26.11.2
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CC1200Chip Class Referenceabstract
Supported Chip Drivers » CC1200

TI CC1200 Radio Transceiver. More...

#include <CC1200Chip.hpp>

Inheritance diagram for CC1200Chip:
PacketRadioChip

Classes

struct  RegisterSetting

Public Types

enum  {
  REG_SYNC3 = 0x0004 , REG_SYNC2 = 0x0005 , REG_SYNC1 = 0x0006 , REG_SYNC0 = 0x0007 ,
  REG_SYNC_CFG1 = 0x0008 , REG_SYNC_CFG0 = 0x0009 , REG_DEVIATION_M = 0x000A , REG_MODCFG_DEV_E = 0x000B ,
  REG_DCFILT_CFG = 0x000C , REG_PREAMBLE_CFG1 = 0x000D , REG_PREAMBLE_CFG0 = 0x000E , REG_IQIC = 0x000F ,
  REG_CHAN_BW = 0x0010 , REG_MDMCFG1 = 0x0011 , REG_MDMCFG0 = 0x0012 , REG_SYMBOL_RATE2 = 0x0013 ,
  REG_SYMBOL_RATE1 = 0x0014 , REG_SYMBOL_RATE0 = 0x0015 , REG_AGC_REF = 0x0016 , REG_AGC_CS_THR = 0x0017 ,
  REG_AGC_GAIN_ADJUST = 0x0018 , REG_AGC_CFG3 = 0x0019 , REG_AGC_CFG2 = 0x001A , REG_AGC_CFG1 = 0x001B ,
  REG_AGC_CFG0 = 0x001C , REG_FIFO_CFG = 0x001D , REG_DEV_ADDR = 0x001E , REG_SETTLING_CFG = 0x001F ,
  REG_FS_CFG = 0x0020 , REG_WOR_CFG1 = 0x0021 , REG_WOR_CFG0 = 0x0022 , REG_WOR_EVENT0_MSB = 0x0023 ,
  REG_WOR_EVENT0_LSB = 0x0024 , REG_RXDCM_TIME = 0x0025 , REG_PKT_CFG2 = 0x0026 , REG_PKT_CFG1 = 0x0027 ,
  REG_PKT_CFG0 = 0x0028 , REG_RFEND_CFG1 = 0x0029 , REG_RFEND_CFG0 = 0x002A , REG_PA_CFG1 = 0x002B ,
  REG_PA_CFG0 = 0x002C , REG_ASK_CFG = 0x002D , REG_IF_MIX_CFG = 0x2F00 , REG_FREQOFF_CFG = 0x2F01 ,
  REG_TOC_CFG = 0x2F02 , REG_MARC_SPARE = 0x2F03 , REG_ECG_CFG = 0x2F04 , REG_MDMCFG2 = 0x2F05 ,
  REG_EXT_CTRL = 0x2F06 , REG_RCCAL_FINE = 0x2F07 , REG_RCCAL_COARSE = 0x2F08 , REG_RCCAL_OFFSET = 0x2F09 ,
  REG_FREQOFF1 = 0x2F0A , REG_FREQOFF0 = 0x2F0B , REG_FREQ2 = 0x2F0C , REG_FREQ1 = 0x2F0D ,
  REG_FREQ0 = 0x2F0E , REG_IF_ADC2 = 0x2F0F , REG_IF_ADC1 = 0x2F10 , REG_IF_ADC0 = 0x2F11 ,
  REG_FS_DIG1 = 0x2F12 , REG_FS_DIG0 = 0x2F13 , REG_FS_CAL3 = 0x2F14 , REG_FS_CAL2 = 0x2F15 ,
  REG_FS_CAL1 = 0x2F16 , REG_FS_CAL0 = 0x2F17 , REG_FS_CHP = 0x2F18 , REG_FS_DIVTWO = 0x2F19 ,
  REG_FS_DSM1 = 0x2F1A , REG_FS_DSM0 = 0x2F1B , REG_FS_DVC1 = 0x2F1C , REG_FS_DVC0 = 0x2F1D ,
  REG_FS_LBI = 0x2F1E , REG_FS_PFD = 0x2F1F , REG_FS_PRE = 0x2F20 , REG_FS_REG_DIV_CML = 0x2F21 ,
  REG_FS_SPARE = 0x2F22 , REG_FS_VCO4 = 0x2F23 , REG_FS_VCO3 = 0x2F24 , REG_FS_VCO2 = 0x2F25 ,
  REG_FS_VCO1 = 0x2F26 , REG_FS_VCO0 = 0x2F27 , REG_GBIAS6 = 0x2F28 , REG_GBIAS5 = 0x2F29 ,
  REG_GBIAS4 = 0x2F2A , REG_GBIAS3 = 0x2F2B , REG_GBIAS2 = 0x2F2C , REG_GBIAS1 = 0x2F2D ,
  REG_GBIAS0 = 0x2F2E , REG_IFAMP = 0x2F2F , REG_LNA = 0x2F30 , REG_RXMIX = 0x2F31 ,
  REG_XOSC5 = 0x2F32 , REG_XOSC4 = 0x2F33 , REG_XOSC3 = 0x2F34 , REG_XOSC2 = 0x2F35 ,
  REG_XOSC1 = 0x2F36 , REG_ANALOG_SPARE = 0x2F38 , REG_PA_CFG3 = 0x2F39 , REG_DCFILTOFFSET_I1 = 0x2F69 ,
  REG_DCFILTOFFSET_I0 = 0x2F6A , REG_DCFILTOFFSET_Q1 = 0x2F6B , REG_DCFILTOFFSET_Q0 = 0x2F6C , REG_IQIE_I1 = 0x2F6D ,
  REG_IQIE_I0 = 0x2F6E , REG_IQIE_Q1 = 0x2F6F , REG_IQIE_Q0 = 0x2F70 , REG_AGC_GAIN2 = 0x2F7A ,
  END_OF_CONFIG = 0xFFFF
}

Public Member Functions

virtual error_t setMode (const RegisterSetting *conf)=0
virtual error_t enableFec ()=0
virtual error_t disableFec ()=0
Public Member Functions inherited from PacketRadioChip
virtual error_t begin ()=0
virtual error_t readFrame (RadioPacket *frame)=0
 수신 버퍼에서 프레임을 읽습니다.
virtual bool bufferIsEmpty ()=0
virtual void flushBuffer ()=0
virtual void sleep ()=0
virtual void wakeup ()=0
virtual error_t transmit (RadioPacket *frame)=0
virtual bool cca ()=0
 채널이 혼잡한지 아닌지 검사합니다.
void setCcaThreshold (int16_t dBthreshold)
virtual void setTxPower (int8_t dBm)=0
 송신 출력을 설정합니다.
virtual int8_t getTxPower ()=0
 현재 설정된 송신 출력을 반환합니다.
virtual void setChannel (uint32_t channel)=0
 채널을 설정합니다.
virtual uint32_t getChannel ()=0
 현재 설정된 채널을 반환합니다.
virtual int64_t getDeviceTimestamp ()
 장치 내부의 timestamp 값을 읽습니다.

Additional Inherited Members

Public Attributes inherited from PacketRadioChip
void(* onRxStarted )(void *, GPIOInterruptInfo_t *)
 수신이 시작될 때 호출될 콜백함수 포인터
void * ctxOnRxStarted
 onRxStarted 가 호출될 때 함께 전달될 context
void(* onRxDone )(void *, GPIOInterruptInfo_t *)
 수신이 완료될 때 호출될 콜백함수 포인터
void * ctxOnRxDone
 onRxDone 이 호출될 때 함께 전달될 context
void(* onTxDone )(void *, bool, GPIOInterruptInfo_t *)
 transmit() 후, 송신이 완료될 때 호출될 콜백함수 포인터
void * ctxOnTxDone
 onTxDone 이 호출될 때 함께 전달될 context
void(* onChannelBusy )(void *, GPIOInterruptInfo_t *)
 cca() 시 채널이 혼잡할 때 호출될 콜백함수 포인터
void * ctxOnChannelBusy
 onChannelBusy 가 호출될 때 함께 전달될 context
int16_t dBccaThreshold = -65
 cca() 시 채널이 혼잡하다고 판단하기 위한 에너지 레벨을 설정합니다. (단위: dB, 기본값: -65)

Detailed Description

TI CC1200 Radio Transceiver.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum
63 {
64 REG_SYNC3 = 0x0004,
65 REG_SYNC2 = 0x0005,
66 REG_SYNC1 = 0x0006,
67 REG_SYNC0 = 0x0007,
68 REG_SYNC_CFG1 = 0x0008,
69 REG_SYNC_CFG0 = 0x0009,
70 REG_DEVIATION_M = 0x000A,
71 REG_MODCFG_DEV_E = 0x000B,
72 REG_DCFILT_CFG = 0x000C,
73 REG_PREAMBLE_CFG1 = 0x000D,
74 REG_PREAMBLE_CFG0 = 0x000E,
75 REG_IQIC = 0x000F,
76 REG_CHAN_BW = 0x0010,
77 REG_MDMCFG1 = 0x0011,
78 REG_MDMCFG0 = 0x0012,
79 REG_SYMBOL_RATE2 = 0x0013,
80 REG_SYMBOL_RATE1 = 0x0014,
81 REG_SYMBOL_RATE0 = 0x0015,
82 REG_AGC_REF = 0x0016,
83 REG_AGC_CS_THR = 0x0017,
84 REG_AGC_GAIN_ADJUST = 0x0018,
85 REG_AGC_CFG3 = 0x0019,
86 REG_AGC_CFG2 = 0x001A,
87 REG_AGC_CFG1 = 0x001B,
88 REG_AGC_CFG0 = 0x001C,
89 REG_FIFO_CFG = 0x001D,
90 REG_DEV_ADDR = 0x001E,
91 REG_SETTLING_CFG = 0x001F,
92 REG_FS_CFG = 0x0020,
93 REG_WOR_CFG1 = 0x0021,
94 REG_WOR_CFG0 = 0x0022,
95 REG_WOR_EVENT0_MSB = 0x0023,
96 REG_WOR_EVENT0_LSB = 0x0024,
97 REG_RXDCM_TIME = 0x0025,
98 REG_PKT_CFG2 = 0x0026,
99 REG_PKT_CFG1 = 0x0027,
100 REG_PKT_CFG0 = 0x0028,
101 REG_RFEND_CFG1 = 0x0029,
102 REG_RFEND_CFG0 = 0x002A,
103 REG_PA_CFG1 = 0x002B,
104 REG_PA_CFG0 = 0x002C,
105 REG_ASK_CFG = 0x002D,
106 REG_IF_MIX_CFG = 0x2F00,
107 REG_FREQOFF_CFG = 0x2F01,
108 REG_TOC_CFG = 0x2F02,
109 REG_MARC_SPARE = 0x2F03,
110 REG_ECG_CFG = 0x2F04,
111 REG_MDMCFG2 = 0x2F05,
112 REG_EXT_CTRL = 0x2F06,
113 REG_RCCAL_FINE = 0x2F07,
114 REG_RCCAL_COARSE = 0x2F08,
115 REG_RCCAL_OFFSET = 0x2F09,
116 REG_FREQOFF1 = 0x2F0A,
117 REG_FREQOFF0 = 0x2F0B,
118 REG_FREQ2 = 0x2F0C,
119 REG_FREQ1 = 0x2F0D,
120 REG_FREQ0 = 0x2F0E,
121 REG_IF_ADC2 = 0x2F0F,
122 REG_IF_ADC1 = 0x2F10,
123 REG_IF_ADC0 = 0x2F11,
124 REG_FS_DIG1 = 0x2F12,
125 REG_FS_DIG0 = 0x2F13,
126 REG_FS_CAL3 = 0x2F14,
127 REG_FS_CAL2 = 0x2F15,
128 REG_FS_CAL1 = 0x2F16,
129 REG_FS_CAL0 = 0x2F17,
130 REG_FS_CHP = 0x2F18,
131 REG_FS_DIVTWO = 0x2F19,
132 REG_FS_DSM1 = 0x2F1A,
133 REG_FS_DSM0 = 0x2F1B,
134 REG_FS_DVC1 = 0x2F1C,
135 REG_FS_DVC0 = 0x2F1D,
136 REG_FS_LBI = 0x2F1E,
137 REG_FS_PFD = 0x2F1F,
138 REG_FS_PRE = 0x2F20,
139 REG_FS_REG_DIV_CML = 0x2F21,
140 REG_FS_SPARE = 0x2F22,
141 REG_FS_VCO4 = 0x2F23,
142 REG_FS_VCO3 = 0x2F24,
143 REG_FS_VCO2 = 0x2F25,
144 REG_FS_VCO1 = 0x2F26,
145 REG_FS_VCO0 = 0x2F27,
146 REG_GBIAS6 = 0x2F28,
147 REG_GBIAS5 = 0x2F29,
148 REG_GBIAS4 = 0x2F2A,
149 REG_GBIAS3 = 0x2F2B,
150 REG_GBIAS2 = 0x2F2C,
151 REG_GBIAS1 = 0x2F2D,
152 REG_GBIAS0 = 0x2F2E,
153 REG_IFAMP = 0x2F2F,
154 REG_LNA = 0x2F30,
155 REG_RXMIX = 0x2F31,
156 REG_XOSC5 = 0x2F32,
157 REG_XOSC4 = 0x2F33,
158 REG_XOSC3 = 0x2F34,
159 REG_XOSC2 = 0x2F35,
160 REG_XOSC1 = 0x2F36,
161 REG_ANALOG_SPARE = 0x2F38,
162 REG_PA_CFG3 = 0x2F39,
163 REG_DCFILTOFFSET_I1 = 0x2F69,
164 REG_DCFILTOFFSET_I0 = 0x2F6A,
165 REG_DCFILTOFFSET_Q1 = 0x2F6B,
166 REG_DCFILTOFFSET_Q0 = 0x2F6C,
167 REG_IQIE_I1 = 0x2F6D,
168 REG_IQIE_I0 = 0x2F6E,
169 REG_IQIE_Q1 = 0x2F6F,
170 REG_IQIE_Q0 = 0x2F70,
171 REG_AGC_GAIN2 = 0x2F7A,
172 END_OF_CONFIG = 0xFFFF,
173 };
The documentation for this class was generated from the following file:
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